6
PGOOD Output Leakage Current
V
OUT
= 3.3V
-
0.01
0.1
礎
PWM OUTPUT OVER VOLTAGE
Over Voltage Threshold
28
33
38
%
NOTE:
3. Specifications at -40
o
C and +85
o
C are guaranteed by design/characterization, not production tested.
4. This is the V
IN
current consumed when the device is active but not switching. Does not include gate drive current.
5. The dropout voltage is defined as V
IN
- V
OUT
, when V
OUT
is 50mV below the value of V
OUT
for V
IN
= V
OUT
+ 0.5V.
6. The RESET timeout period is linear with CT at the slope of 2.5ms/nF. Thus, at 10nF (0.01礔) the RESET time is 25ms; at 1000nF (0.1礔) the
RESET time would be 250ms.
7. Guaranteed by design, not production tested.
Electrical Specifications Recommended operating conditions unless otherwise noted. V
IN
= V
IN
_LDO = PV
CC
= 3.3V, Compensation
Capacitors = 33nF for LDO1 and LDO2. T
A
= 25
o
C. (Note 2) (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Typical Performance Curves
FIGURE 1. PWM SOFTSTART
FIGURE 2. PWM PHASE NODE SWITCHING
FIGURE 3. PWM OUTPUT RIPPLE WAVEFORMS
FIGURE 4. PWM LOAD REGULATION
TIME (ms)
(2ms/DIV)
V
IN
V
OUT1
1V/DIV
1V/DIV
0V
0V
TIME (?/SPAN>s)
(0.5?/SPAN>s/DIV)
1V/DIV
0V
TIME (?/SPAN>s)
(2?/SPAN>s/DIV)
20mV/
DIV
1.82
1.815
1.81
1.805
1.8
0
0.05
0.1
0.15
0.2
0.25
0.3
LOAD CURRENT (A)
ISL6413
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